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SPDIF: Coding Format

Bi-phase Mark Code (BMC)

BMC is a type of phase modulation which is used for coding SPDIF digital signals. In this system, a logical 1 is represented by two zero-crossings of the signal and logical 0 is represented by one zero-crossing.

Data Bit

The clock frequency is two times the bit rate. The original data bits are represented as two logical states together forming a cell or time slot. A cell length is equal to data bit length. There is always inversion of the logical level at a bit start. This inversion is to the previous bit end level. To put it simply, the level at the end of a bit is equal or inverted to the level at the start of the bit.

Preambles

A preamble that controls synchronization is formed of the first 4 bits (bits 0 to 3) of a 32 bit word. This synchronization not carrying actually any data has length equal to 4 data bits. Since it does not use BMC, in a row there can be bit patterns of more than two zeros or one. Depending on the parity of the last cell of the previous 32 bit word, sync-patterns appear in mainly three different forms, viz. B, M and W. Preamble B marks at the start of a data block a word containing data for left channel A. Channel A data which is not located at the start of the data block is marked with a word by preamble M. Right Channel B data is marked with a word by preamble W. In a multi-channel arrangement, preamble W can mark word containing data for any other channel except A.

Bits Meaning

Each sample is transmitted as a sub-frame of 32 bit word with different meaning for bits. Bits 0 to 3 are preamble, 4-7 auxiliary audio data bits, 8-27 samples, bit 28 for validity, 29 for sub-code data, 30 for information on channel status and 31 for parity.

 
 
© 2007 SPDIF World. Some data provided courtesy of SPDIF.